At Synopsys, we drive the innovations that shape the way we live and connect. Our technology is central to the Era of Pervasive Intelligence, from self-driving cars to learning machines. We lead in chip design, verification, and IP integration, empowering the creation of high-performance silicon chips and software content. Join us to transform the future through continuous technological innovation.
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world's broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities, meet unique performance, power, and size requirements of their target applications, and get differentiated products to market quickly with reduced risk.
You are a passionate and experienced analog design engineer who thrives in a collaborative, innovative environment. With a deep understanding of CMOS processes and analog/mixed signal circuitry, you are eager to take on challenging design tasks and contribute to groundbreaking technologies powering the next generation of smart devices. You have a proven track record of delivering high-quality circuit solutions, especially in DDR I/O design, and you are comfortable navigating complex technical requirements and industry standards such as JEDEC for DDR interfaces.
You are motivated by the opportunity to work at the intersection of hardware and software, and you value continuous learning and growth. Your communication skills enable you to work effectively with cross-functional teams, sharing knowledge and driving projects forward. You approach problems with analytical rigor and creativity, always striving for the best balance of performance, power, and size. You are adaptable, detail-oriented, and committed to excellence in every aspect of your work. Whether mentoring junior engineers or collaborating with global teams, you embody Synopsys' spirit of innovation and inclusivity.
Designing and implementing high-performance DDR I/O analog circuits for advanced SoC applications.
Collaborating with digital and mixed-signal teams to ensure seamless integration of analog IP blocks.
Executing circuit design tasks with a focus on product quality, efficiency, and adherence to project timelines.
Conducting simulations, verification, and layout reviews to optimize circuit performance and robustness.
Interpreting and applying JEDEC DDR interface standards, timing, and ODT requirements in your designs.
Participating in design reviews and providing technical guidance to junior engineers and peers.
Documenting design methodologies, results, and best practices for internal knowledge sharing.
Empowering customers to bring differentiated products to market quickly with reduced risk.
Enhancing the performance, power efficiency, and reliability of Synopsys' silicon IP portfolio.
Driving innovation in DDR I/O circuit design, contributing to industry-leading solutions for smart devices.
Facilitating smooth integration of analog and mixed-signal blocks within complex SoCs.
Setting new standards for quality and excellence in analog design methodologies.
Mentoring and supporting the development of next-generation engineering talent.
BTech/MTech in Electrical Engineering, Electronics, or related field.
Minimum 2 years (MTech) or 3 years (BTech) of relevant experience in analog circuit design.
Strong knowledge of CMOS processes and deep submicron technology challenges.
Proficiency in CMOS circuit design, layout methodologies, and flow.
Basic understanding of analog/mixed signal circuitry; familiarity with ESD concepts is an advantage.
Experience with ASIC design flow and DDR interface standards (JEDEC, DDR timing, ODT, SDRAM functionality) is a plus.
Detail-oriented, analytical thinker with strong problem-solving skills.
Excellent written and verbal communication abilities for effective team collaboration.
Proactive and adaptable, able to manage multiple priorities in a fast-paced environment.
Collaborative mindset, open to diverse perspectives and continuous learning.
Committed to delivering high-quality work and driving innovation.
You'll join a dynamic engineering team focused on silicon IP development, collaborating with experts in analog, digital, and mixed-signal design. The team is committed to advancing the frontiers of chip design, fostering an inclusive culture where ideas are shared, and innovation thrives. You'll work alongside passionate engineers who value technical excellence and teamwork.
We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non-monetary offerings. Your recruiter will provide more details about the salary range and benefits during the hiring process.