✨ About The Role
- The FPGA Engineer will develop new feature enhancements in existing FPGA designs.
- Responsibilities include writing RTL code for signal processing blocks and interfacing with devices like ADCs and DACs.
- The role involves creating testbenches for test vector matching and interface validation.
- Candidates will simulate and debug designs using ModelSim and develop timing constraints in Vivado.
- The first 30 days will focus on learning to build and simulate the FPGA design and understanding RFID PHY and MAC layers.
- By the 60-day mark, the engineer will implement a new feature enhancement and verify changes with test vectors.
- In the first 90 days, the engineer will develop testbenches for the RF control sub-system and identify architecture improvements.
⚡ Requirements
- The ideal candidate will have a Master's Degree in Electrical Engineering or a related field.
- A minimum of 5 years of experience in FPGA design and verification is required.
- Proficiency in VHDL and/or Verilog is essential for this role.
- Experience with AMD SoC and FPGA products, particularly the Zynq family, is preferred.
- Strong communication skills, both verbal and written, are necessary for effective collaboration with team members.
- The candidate should be self-directed and capable of completing tasks independently with minimal supervision.
- Familiarity with RF transceivers and signal processing, especially in wireless systems, is important.
- Experience with lab equipment such as spectrum analyzers and oscilloscopes is a plus.