NVIDIA MMPLEX DLA (Deep Learning Accelerator) and PVA (Programmable Vision Accelerator) teams are looking for a Senior ASIC Digital Design Engineer. In this role, you will work closely with the architecture and verification engineers to define, implement, and verify the good quality of DLA/PVA IP. DLA/PVA IPs are used in multiple chips, like Tegra, auto mobile, client, etc, which are used in NVIDIA products around the world.
What you will be doing:
What we need to see: