Principal Engineer, Hardware & Silicon Validation

Hardware and Silicon Validation Principal Engineer

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

As a Hardware and Silicon Validation Principal Engineer at Marvell, you'll be helping to deliver high bandwidth over long distances. This team performs analog validations on amplifiers that drive optical electronic devices and receivers. We also validate silicon photonics, do upper electronic measurements and support the coherent digital signal programming unit. This is a niche area at Marvell, working with cutting edge technologies used by many internal and external customers around the world.

What You Can Expect:

• Complete responsibility of PHY Validation in post-silicon environment
• Defining, documenting, executing, and reporting the overall PHY validation/test plan for Marvell storage devices
• Lab-based silicon bring-up and unit test execution focused on Physical and PCS layer hardware and firmware functionality
• Perform high speed signal validation and analysis using various test equipment to measure Eye diagram/Jitter/BER
• Analyze and debug issues on Phy protocol of storage interface (SATA, SAS, PCIe, Ethernet)
• Troubleshoot failing tests with diagnostics, software tools, hardware analyzers, oscilloscopes, meters, logic/protocol analyzers
• Lead collaborative technical discussions to drive resolution on technical issues
• Work with cross-functional teams and external vendors to debug any post-silicon and/or customer issues related to Ethernet/PCIe PHY
• Work closely with customers to address design issue and debug failure cases

What We're Looking For:

• Bachelor of Science in Electrical Engineering with 10-12 years of relevant work experience, or Master of Science in Electrical Engineering with more than 10 years of relevant work experience preferred.
• Strong understanding of high-speed SERDES, equalization technique and any high-speed standard (IEEE802.3, PCIe, DP, etc.)
• Proven experience in High-Speed IO testing, debugging and validation, strong lab skills with hands on experience, in system bring up, system testing and debug.
• In-depth working knowledge of test equipment used for SERDES characterization (Scope, BERT, Network analyzer, etc.).
• Working knowledge of IEEE 802.3 400G/800G/1.6T interface and characterization
• Working knowledge of board design; able to read board schematics and board layout.
• Knowledge in SERDES modeling techniques and proven experience working with Perl or Python.
• Working knowledge and experience on PCIe and/or SAS/SATA SERDES and extensive knowledge of the physical and protocol levels (PIPE I/F, PCS, MAC) of one or more common high-speed interfaces is a definite plus.

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us.