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Digital IC Design, Staff Engineer (syn/sta)

Perform logic synthesis and physical verification for multi-million gate ASICs in a fast-paced environment
Ho Chi Minh City, Vietnam
Senior
yesterday
Marvell

Marvell

A leading semiconductor company specializing in storage, processing, networking, security, and connectivity solutions.

Marvell Semiconductor Solutions

Marvell's semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, automotive, and carrier architectures, our innovative technology is enabling new possibilities.

At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead.

Your Team, Your Impact

Storage BU - Vietnam

What You Can Expect

  • Perform logic synthesis at sub-system or top level for multi-million gate ASIC projects
  • Perform ECO (Engineering-Change-Order) and formal verification
  • Work with logic design and PnR engineers on logic, timing, power and physical issues.
  • Manage schedules and support cross-functional engineering effort.
  • Implement, enhance and maintain synthesis scripts.
  • Contribute to the continuous development of IC design flow

What We're Looking For

  • BS/MS in Electrical Engineering/Computer Engineering, or related fields and 6+ years of experiences working on logic synthesis for multi-million-gate ASIC/SoC projects. Newly graduated candidate with 7+ GPA is also welcome.
  • Very familiar with IC design flow.
  • Experiences in commercial implementation tools for logic synthesis (DC, Genus), formal verification (LEC, Formality), STA (PrimeTime, Tempus).
  • Experience of synthesizable Verilog and/or VHDL codes.
  • Experience in Linus environment and writing/using scripting languages such as Perl, TCL, etc.
  • Knowledge of area, speed, power optimizations during logic synthesis.
  • Self-motivated and excited to learn new skills, tools, IP, and design flows.
  • Good written and oral communication skills in English.
  • Experience in timing constraint development and timing constraint debug is a plus
  • Experience in Conformal ECO flow, PnR tools is plus

With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We're dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it's like to work at Marvell, visit our Careers page.

All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.

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Digital IC Design, Staff Engineer (syn/sta)
Ho Chi Minh City, Vietnam
Engineering
About Marvell
A leading semiconductor company specializing in storage, processing, networking, security, and connectivity solutions.