Primary Skill: Python
Python Programming Language - Physical Design Develop & own physical design implementation of multi-hierarchy low-power designs including physical-aware logic synthesis, design for testability, floor-plan, place & route, static timing analysis, IR Drop, EM, & physical verification in advanced technology nodes. Resolve design & flow issues related to physical design, identify potential solutions, & drive execution. Deliver physical design of an end-to-end IP or integration of ASIC/SoC design Min.
Qualifications: 0-1 yrs of exp. Engineer – CL11 & CL10 Master's degree in Electrical Eng. or Comp. Science RTL2GDSII exp. on advanced tech. nodes (7nm and below) Exp. w/low power implementation & signoff, power gating, multiple voltage rails, UPF/CPF knowled.
Exp. in Block-level & Full-chip floor-planning & power grid planning, w/Python, TCL, or Perl progr., working w/EDA tools like DC/Genus, ICC2/Innovus, Primetime, Redhawk/Voltus or Calibre