Work on transistor level design of analog and mixed signal circuits in memory (SRAM/DRAM) for display chip or image sensor. Conducted full-chip, block-level, and transistor-level simulations using HSPICE/Spectre to validate functionality. Perform the block level and transistor level layout design using CAD tools like Cadence Virtuoso and Calibre. Collaborate with verification, process, test, and application engineers to debug, characterize and optimize the performance.