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DDR Design Engineer

Design and verify high-speed DDR PHY circuits for Apple silicon chips
Cupertino, California, United States
Senior
yesterday
California Staffing

California Staffing

Arkansas Staffing appears to be a government-associated entity focused on workforce development and employment services within the state of Arkansas.

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Ddr Design Engineer

At Apple, we work to craft products that enrich people's lives. Do you love working on challenges that no one has solved yet? Do you like changing the game? We have an opportunity for a forward-thinking and unusually hardworking DDR Design Engineer. As a member of our multifaceted group, you will have the rare and great opportunity to craft upcoming products that will delight and encourage millions of Apple's customers every single day! You will join the DDR PHY design team. We provide outstanding PHY designs for high-performance, low power applications. As a logic design engineer, you will be involved in all phases of the design, from concept study, architecture definition, design and verification, to silicon bring-up and characterization.

In this role, you will be responsible for:

  • Performing concept studies and providing direction in terms of performance, gate count and power for various digital designs.
  • Writing detailed design specification and test plans in close collaboration with architecture, circuit designers and verification engineers.
  • Providing high-quality RTL description, including assertions, for the design.
  • Supporting design verification to insure bug-free first silicon.
  • Driving functional and code coverage as well as timing closure for your designs.
  • Supporting silicon bring-up, performance and power characterization.

Minimum qualifications:

  • Bs degree in technical discipline with minimum 10 years of relevant experience.

Preferred qualifications:

  • The ideal candidate will have five or more years of experience in logic design with the following qualifications:
    • Rtl design using Verilog or SystemVerilog, assertion writing
    • Design of state machines, data paths, arbitration and clock domain crossing logic
    • Logic synthesis, timing constraints
    • Exposure to Design For Test, understanding of scan concept and writing Dft friendly Rtl
    • Unified Power Format for simulation, synthesis and electrical rule checking Equivalence checking
    • Prior experience in DDR PHY design and mixed-signal environment is a plus

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, veteran status, or other legally protected characteristics.

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DDR Design Engineer
Cupertino, California, United States
Engineering
About California Staffing
Arkansas Staffing appears to be a government-associated entity focused on workforce development and employment services within the state of Arkansas.