View All Jobs 128351
Lead Design Engineer
Own the verification strategy and execute on functional coverage for complex ASICs
Bangalore
Mid-Level
5 hours agoBe an early applicant
Cadence
Provides electronic design automation software and IP for designing, verifying, and optimizing complex semiconductor chips and systems.
43 Similar Jobs at Cadence
At Cadence, We Hire And Develop Leaders And Innovators Who Want To Make An Impact On The World Of Technology
Design verification of ASICs for Palladium.
Position Details:
- Position is based in Bangalore
- Will have to work at IP, Sub-System and SOC level verification.
- Test plan creation, functional coverage plan and coding of functional coverage bins.
- Will be involved in post silicon validation/bring up.
Job Requirements:
- Strong expertise in Verilog, HVL( SV/Specman e) with UVM/OVM/eRM methodology.
- Experience in functional coverage/code coverage/assertions development and closure.
- Experience in test plan creation.
- Exposure to PCIe and LPDDR verification.
- Strong debug skills
- Should be process oriented and have a passion for scripting/automation.
- Should be a good team player
- Effective cross-team communication and documentation skill is strongly preferred.
Minimal qualification requires BS/MS degree ECE or CS with 4+ years of experience in related fields.
We're Doing Work That Matters. Help Us Solve What Others Can't
About Cadence
Provides electronic design automation software and IP for designing, verifying, and optimizing complex semiconductor chips and systems.