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Lead Design Engineer

Lead software development for memory IP silicon bring-up and validation in lab
Bangalore
Mid-Level
16 hours agoBe an early applicant
Cadence

Cadence

Provides electronic design automation software and IP for designing, verifying, and optimizing complex semiconductor chips and systems.

At Cadence, We Hire And Develop Leaders And Innovators Who Want To Make An Impact On The World Of Technology

Design & Develop Software For Memory IP Silicon Bring Up & Characterization; Provide Required Software Support For Customer Soc Bring Up.

Have Experience In Software Development, Tools Development Role, Firmware/Validation Tools Development.

Working Knowledge Of Jtag, I2c, Spi, And Other Relevant Communication Protocols.

Good Understanding Of In Silicon Validation; Debugging Of Soc Software Issues

Skill:

Strong C/C++ Programming Skills

Proficient In Python, Gnu Make, Git

Gui Development Experience Using C# & Tk (Or Similar Tool Kits)

Deep Understanding Of Computer Systems, Operating Systems, And Computer Architecture

Ability/Willing To Write Code Close To The Hardware, And Debugging

Additional Points:

- Candidate With 3 - 6 Years Of Experience

- Hands On Software Development Experience

- Willing To Write Code And Test The Software In Silicon Lab Environment

- Candidate With Good Software Experience Or Embedded Development Experience Will Do

We're Doing Work That Matters. Help Us Solve What Others Can't.

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Lead Design Engineer
Bangalore
Engineering
About Cadence
Provides electronic design automation software and IP for designing, verifying, and optimizing complex semiconductor chips and systems.