Principal FPGA Engineer

FPGA Engineer

At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We're working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight!

This role is part of Advanced Concepts and Enterprise Engineering (ACE), supporting Blue Origin's mission of millions of people living and working in space for the benefit of Earth. The team fosters innovation and drives engineering workflows of the future, shared solutions and standards, simplicity and lower costs, and manufacturable design.

Blue Origin's Enterprise Engineering Flight Systems group is seeking a top tier FPGA Engineer and, to act as an FPGA navigation sensor lead and a business wide subject matter expert in support of the New Shepard, New Glenn, Lunar Permanence, In Space Systems, and Advanced Concepts business FPGA needs at Blue Origin.

As part of a hardworking team of specialists, you will play a critical role in the development, implementation, verification, and testing of our FPGA based designs for spaceflight systems. We are looking for someone to apply their technical expertise with dedicated commitment and detailed attention towards safe and repeatable spaceflight.

Responsibilities

• Generate FPGA requirements in coordination with systems engineering, hardware engineering, and software engineering.
• Design, write HDL code, verify and document complex low-level modules.
• Own FPGA community of practice and facilitate collaboration and commonality across all Blue Origin business units.
• Own common FPGA initiatives and leading-edge AI/ML based initiatives for the future of FPGA design across Blue Origin business units.

Qualifications

• Bachelor of Science in Electrical Engineering, Computer Engineering, or a related discipline.
• 10+ years of FPGA/ASIC design and verification work experience.
• Proficient in writing FPGA level requirements.
• Experience in writing RTL using Verilog, SystemVerilog, or VHDL (SystemVerilog desired).
• Experience with Clock Domain Crossing techniques and analysis.
• Experience with FPGA development tools such as Xilinx Vivado, and Microchip Libero.
• Experience with FPGA Timing Constraint definition, STA, and timing closure.
• Proficient in testbench design and usage.
• Experience with QuestaSim or equivalent simulator.
• Experience debugging failures in simulation to root cause problems.
• Experience using FPGA Design and Verification tools in a Linux environment.
• Working knowledge of DO-254, or other safety-critical standards.
• Ability to influence others and communicate effectively.

Desired

• Master of Science in Electrical Engineering, Computer Engineering, or a related discipline.
• Experience with sophisticated verification techniques such as Universal Verification Methodology (UVM) and Constrained Random Verification.
• Experience with scripting languages.
• Experience with revision control systems, such as Git/SVN.
• Experience with common on-chip bus protocols such as AMBA (AXI, AHB, APB).