✨ About The Role
- The role involves contributing to sophisticated design implementations using the latest technology nodes.
- The candidate will lead one or more aspects of design closure within the team.
- Responsibilities include synthesis, floor planning, place and route, clock tree synthesis, and physical verification.
- The position requires flexibility to adapt to evolving requirements in design implementation.
- The job is located in San Jose, California, and is a full-time position.
âš¡ Requirements
- The ideal candidate should have a BS degree in Electrical Engineering and at least 8 years of related experience.
- Proficiency in multiple EDA vendor solutions is essential for success in this role.
- Strong problem-solving skills and a self-starter mindset are crucial for working independently.
- Experience collaborating within global teams is important, as the role involves working in dynamic environments.
- Hands-on expertise with physical verification and place-and-route tools for ASIC/SoC design is required.