Staff Verification Engineer

Job Title

Arm System IP enables designers to build systems that are high performance, power efficient and reliable. Configurable for many different applications, System IP is the right choice for your system whether it is a high-efficiency IoT endpoint or a high-performance server SoC. The collection of proven silicon interconnects, security IP, system controllers, debug and trace and IP tooling are all designed, validated and optimized to be used with Arm Cortex processors and Arm Mali Multimedia IP. Built upon the open AMBA interface standard, Arm System IP provides design teams with the foundation for building better systems. Arm is at the forefront of artificial intelligence development. We are constantly developing new applications for AI, and this project is a critical part of AI hardware! This position is at our fast growing site in Chandler, Arizona.

Job Description: The ARM Neoverse Coherent Mesh Network is a highly scalable, configurable system interconnect. It is used in a wide array of system sizes and applications, such as networking infrastructure, storage, server, high performance compute, AI, and industrial solutions. Our group is seeking dedicated design verification engineers capable of completing our next generation of products!

Responsibilities:

• Build and maintain detailed verification plans and strategies
• Work alongside architects and designers to debug and develop new features, balancing the needs of multiple partners in our product development cycle.
• Architect and develop sophisticated and efficient SystemVerilog/UVM based test benches.
• Design new stimulus and coverage, debug functional regression failures, and close coverage
• Develop and drive improvements in our verification methodology.

Required Skills and Experience:

• Bachelors, Masters or PhD in Electrical/Computer Engineering or Computer Science
• 7+ years of experience in verification/RTL design
• Multiprocessing microarchitecture experience including knowledge of cache coherence and bus protocols (e.g. AMBA CHI, ACE or AXI).
• Previous experience in specification, creation, and debug of System Verilog/UVM constrained-random testbenches
• Proven software engineering skills including understanding of object-oriented programming, data structures, and algorithms.

"Nice To Have" Skills and Experience:

• Knowledge of PCI Express (PCIe)
• Experience in Formal Verification techniques or scripting languages such as Python or Perl

In Return:

With offices around the world, Arm is a diverse organization of dedicated, creative, and very hardworking engineers. By enabling a multifaceted, inclusive, meritocratic, and open workplace, where everyone can grow and succeed, we encourage our people to share their unrivaled contributions to Arm's success in the global marketplace.

Salary Range: $191,100-$258,500 per year