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Serdes Circuit Design Engineer

Design and optimize high-speed SerDes analog circuits for Apple’s next-generation SOCs
San Francisco, California, United States
Senior
$126,800 – 190,900 USD / year
16 hours agoBe an early applicant
Apple

Apple

A multinational technology company known for its consumer electronics, software, and online services, including the iPhone, iPad, and Mac computers.

SerDes Circuit Design Engineer

We are seeking talented Analog Mixed-Signal designers to join our high-speed SerDes team! Our team specializes in building next generation high-performance wireline transceivers delivering intellectual-property (IP) for Apple's world-leading system-on-chip (SOC). In this role, you will actively work with cross-functional Analog Mixed-Signal design teams to create and execute on state-of-the-art IPs key to Apple's products. You will be challenged to make the best-in-class designs to surprise and delight Apple customers. With redefining the user experience in focus, you will get an opportunity to work on designs which makes the best systems. This enables you to learn end-to-end system while exceeding the highest expectations of quality, innovation and efficiency. If you have strong fundamentals and a track record of tackling technical challenges, you are passionate about learning new skills and improving the value of your work, and you like to be tuned to the bigger-picture while diving deeply into the details to innovate and tackle problems- we invite you to join and grow with our team!

Description

You will work on the development of high-performance and high-speed AMS circuits used in SerDes PHY, including evaluation of different circuit topologies for specific product requirements (e.g., Rx, CDR, Tx, bias generator, high-speed clock generation and low-jitter distribution, high-speed analog signal chain, mixed-signal calibration and algorithms) with best in class power, performance, and area (PPA). You will work with cross-functional teams (e.g., architecture, SIPI, packaging, board design, DFT, ESD) to create block-level specifications and execute on transistor-level implementation and behavioral modeling. You will drive mask design to implement layout view of designs. You will closely work with SOC teams to deliver IP views and make sure they meet the quality standards. While developing these complex IPs, on regular basis you will interact with your peers/management to communicate progress and discuss new ideas making it a lively and interactive work environment.

Minimum Qualifications

Minimum requirement of a bachelors degree.

Preferred Qualifications

Deep understanding of analog mixed-signal design with experience in high-speed serial links. Understanding and experience of designing analog mixed signal circuit blocks including Bandgap, biasing circuits, LDO regulators, amplifiers, comparators, switched-cap circuits, ADCs, DACs, Oscillators, Filters Understanding of analog mixed-signal concepts like mismatch mitigation, linearity, stability, low-power and low-noise techniques Good grasp and understanding of digitally assisted analog design concepts (e.g. background calibrations, LMS based adaptive loops) Experience with high-speed digital circuits (e.g., serializer, deserializer, counters, dividers, etc.) with solid understanding of digital design concepts Knowledge of Tx/Rx equalization techniques and circuits (e.g. CTLE, DFE, de-emphasis) for 64+ Gbps NRZ and PAM applications Knowledge of CDR architectures and implementations Knowledge of lab equipment and testing Experience in Analog Mixed Signal circuit modeling and performance evaluation (e.g. SystemVerilog, Matlab, Python, VerilogAMS) Hands-on experience in advanced CMOS technologies, design with FinFet technology Hands-on experience with AMS IC development from definition to high-volume production including layout supervision, bench evaluation, correlation, and characterization Concepts of timing closure and related industry tools (e.g., Nanotime, Primetime) Experience in lab testing of high-speed serial I/O, debug and data analysis techniques Knowledge of common high-speed SerDes protocols (e.g., PCIe, USB, DP, MPHY) Skills in scripting and automation to enhance efficiency are highly desirable

Pay & Benefits

At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $126,800 and $190,900, and your base pay will depend on your skills, qualifications, experience, and location. Apple employees also have the opportunity to become an Apple shareholder through participation in Apple's discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple's Employee Stock Purchase Plan. You'll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics.

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Serdes Circuit Design Engineer
San Francisco, California, United States
$126,800 – 190,900 USD / year
Engineering
About Apple
A multinational technology company known for its consumer electronics, software, and online services, including the iPhone, iPad, and Mac computers.