Senior Memory Design Engineer
Analog Devices
Senior Digital Design Engineer
Analog Devices Foundation IP group is seeking a highly qualified individual to join a team of innovative engineers in developing foundation IPs (standard cell, I/O, and memory) to support mixed-signal SOC designs at various technology nodes. This position involves activities in memory macro/compiler development cycle including:
- Memory development and behavior modeling.
- Developing advanced models/views for leading-edge EDA design/layout/analysis tools/flows.
- Memory QA methodology development and execution.
- Maintain and support released memories.
- Programming for flow and procedure automation.
Specific Tasks to Complete:
- Support internal and external memory compilers.
- Memory instance view generation and characterization.
- Develop memory verification methodology.
- Memory test and post silicon memory analysis.
Minimum Requirements:
- MSEE or MSCE with 2+ years of industrial experience in memory development.
- Solid industrial experience with memory design and verification.
- Experienced with both transistor-level and gate-level simulations.
- Familiar with design and layout of logic circuits.
- Good knowledge of analog and digital design flows.
- Good UNIX background and Perl/Shell/SKILL scripting skills.
- Strong problem-solving, written, and verbal communication skills.
Analog Devices is an equal opportunity employer. We foster a culture where everyone has an opportunity to succeed regardless of their race, color, religion, age, ancestry, national origin, social or ethnic origin, sex, sexual orientation, gender, gender identity, gender expression, marital status, pregnancy, parental status, disability, medical condition, genetic information, military or veteran status, union membership, and political affiliation, or any other legally protected group.