Principal Engineer, Analog Design Engineering
Analog Devices
Principal Analog Design Engineer
We are seeking a senior analog IC design engineer with deep expertise in high-speed TIA/driver design and strong knowledge of optical/photonics systems.
In this role, you will lead architecture definition, drive key technical decisions, mentor junior engineers, and partner closely with photonics, packaging, and system teams to deliver next-generation optical IC solutions.
Responsibilities:
Engage with key customers and ecosystem partners to understand system requirements, optical interface specifications, performance targets, and integration constraints; translate these into clear IC-level specifications and architectural requirements.
Lead architecture definition and technical decision-making for SiGe-based high-speed analog front-end ICs (TIA/Driver).
Design and optimize broadband, low-noise, high-linearity high-speed circuits in SiGe BiCMOS.
Oversee full design cycle: specification → architecture → transistor-level design → post-layout verification → tape-out.
Drive lab characterization, root-cause analysis, and design improvements.
Collaborate with photonics teams to integrate ICs with optical devices (PD, DFB/VCSEL lasers, modulators, etc.).
Define system-level models and performance budgets across electrical and optical domains.
Support co-packaged optics (CPO) or advanced packaging initiatives.
Support to develop advanced electrical/optical test methodologies & qualification plans.
Support to select appropriate test instrumentation and optimize measurement flow.
Communicate clearly across multi-disciplinary teams and external partners.
Provide technical guidance and mentorship to junior engineers.
Qualifications:
Master's degree or above in EE, microelectronics, physics, materials engineering, or related.
8+ years of analog IC design experience with 5+ years in SiGe high-speed circuits.
Proven leadership in designing TIA/driver or similar broadband analog front-end ICs.
Strong experience in:
Si photonics & photonic circuit modeling
Cadence/Synopsys EDA
High-speed lab validation (BER testing, jitter analysis, eye diagram evaluation)