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SOC Timing Engineer - College Graduate

Lead timing closure efforts for SOC design from synthesis to timing verification
Penang, Malaysia
Entry Level
14 hours agoBe an early applicant
Altera

Altera

Designs and supplies programmable logic devices and related technologies for customizable, high-performance digital system and FPGA-based solutions.
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Job Description

Candidate will be involved in all aspects of STA.

Candidate will also need to work with Frontend, DFT and verification team to understand design definition and requirement and provide feedback on timing and physical challenges.

Qualifications

BE/MS/Phd in Electronics/Electrical Engineering with keen interest in physical design, timing and physical integration.

Candidate should be strong in communication, problem solving, analytical skill and attitude to learn and perform.

Job Type

Regular

Shift

Shift 1 (Malaysia)

Primary Location

Penang 15, Penang, Malaysia

Posting Statement

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

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SOC Timing Engineer - College Graduate
Penang, Malaysia
Engineering
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About Altera
Designs and supplies programmable logic devices and related technologies for customizable, high-performance digital system and FPGA-based solutions.