Responsible for CMOS custom circuit design and validation for high speed IO buffer.
Involve in entire design cycle including spec definition, architecture definition, design implementation, circuit/functional validation and all the way to support silicon correlation.
Work with Product Architecture team on architecture and process evaluation for new product or new IO buffer design. Perform competitive analysis vs competitors.
High speed IO buffer circuit design including DDR IO, LVDS IO and high voltage (3V) IO as well as supporting logics like Vref, OCT, ESD and etc.
Circuit simulation and verification using industry simulator such as SPICE sim. Logic/functional validation using VCS or logic equivalency checker
Support layout floorplanning and layout review to produce quality and reliable layout
BS/MS in Electronics Engineering.
CMOS circuit design basic knowledge and understanding.
Knowledge and/or experience in front-end (RTL & synthesis) design would be an added advantage.
Strong in communication, leadership, problem solving and analytical skills.
Regular
Shift 1 (Malaysia)
Penang 15, Penang, Malaysia
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.