System Design - Post Silicon Validation Engineer

System Design - Post Silicon Validation Engineer

What you do at AMD changes everything. At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

We are looking for a dynamic, energetic Lead/Senior Systems Design Engineer to join our growing team. As a key contributor to the success of AMD's product, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry leading technologies to market. The Systems Design Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

The Person

As a Systems Design Engineer, you will drive balanced, scalable, and automated solutions. In this high visibility position, your software systems engineering expertise will be necessary towards product development, definition, and root cause resolution.

Key Responsibilities

Serve as a technical lead for system-level validation and debug across client platforms. Own and drive resolution of high-complexity, cross-functional system issues, particularly related to PCIe, USB, memory, platform power management and RAS. Define and evolve system validation strategies, debug methodologies, and best practices. Analyze and debug protocol behavior including link training, enumeration, power state transitions (D-states, ASPM, L1 Substates), hot-plug, and error handling in PCIe, Ethernet and Memory. Lead root cause analysis across hardware, firmware, BIOS, OS, and drivers, and drive corrective actions with design and firmware teams. Develop and drive adoption of debug tools, automation, and log analysis frameworks to improve efficiency and observability. Provide technical guidance and mentorship to junior engineers within the team. Influence platform architecture and feature definition by providing early feedback based on system-level experience. Drive cross-functional collaboration with silicon design, firmware, BIOS, OS, validation, and platform partners to ensure product readiness.

Preferred Experience

Deep expertise in high-speed IO protocols, especially PCIe and/or USB, including power management, error handling, and corner-case behaviors. Strong platform-level system knowledge, including SoC architecture, firmware (BIOS/UEFI, PMFW), OS interactions, and board-level considerations. Understanding of RAS fundamentals is a plus. Proven experience leading and resolving complex, cross-IP system-level issues in post-silicon environments. Solid understanding of x86 or other complex CPU architectures and system initialization flows. Demonstrated ability to design effective debug experiments and drive root cause across multiple subsystems. Extensive experience with board/platform-level debugging, including power sequencing, reset behavior, and timing analysis. Programming/scripting skills (e.g., C/C++, Python, Perl) used to enable debug, automation, or data analysis. Hands-on experience with advanced debug equipment such as protocol analyzers, logic analyzers, oscilloscopes, etc. Proven ability to operate independently, drive ambiguity to clarity, and influence technical decisions across teams.

Academic Credentials

Bachelors or Masters degree in electrical or computer engineering.