Silicon Design Engineer

AMD IP Design Team Member

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The role:

• As one of IP design team members, own for IP level design work, including architecture define (partly own or join), spec documentation, RTL coding, RTL delivery and signoff
• The target IP is used for all AMD mainstream products, product generation upgrade, reusability and scalability need to be considered in architecture define and RTL maintain, as well as compliant to system application and sw/fw/hw cooperation.
• Need to co-work with other teams closely, include communication with AMD global soc architect and IP architect, closely work with verification team, trace and support backend work, silicon validation support.
• The IP team will have flexible work assignment, respect to individual interest and the team target to achieve win-win, encourage and help individuals to discuss with global senior architectures and engineers for variants of topics and work together to resolve problems, aimed to improve both the team and individuals' IP design capability and competitiveness.

The person:

• Strong experience in ASIC/SoC design
• Strong hands-on Verilog development experience, familiar with scripting languages like Perl
• Good experience on complicated hub, control IP design
• Strong problem solving, independent thinking, teamwork and communication skills

Key responsibilities:

• Own part of IP feature design with cooperation with other designers

Preferred experience:

• Knowledge on AXI, PCIE is a big plus.
• Better to have knowledge on x86 system view, embedded HW design with HW/SW/FW co-operation experience.

Academic credentials:

• Preferred MS degree.

Location: Taipei / Hsinchu