Signal & Power Integrity Engineer - Serdes / High Speed Channels

Signal Integrity Engineer

What You Do At AMD Changes Everything At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

As a Signal Integrity Engineer in Networking Technology & Solutions Group (NTSG), you will be responsible for ensuring that AMD's next-generation products deliver industry-leading reliability, performance, and efficiency. This role involves analyzing, modeling and validating the complex interconnects of high-speed Serializer/Deserializer (SerDes) channel.

The Person

In this role, you will closely collaborate with Silicon IP team, ASIC packaging team, PCB team, System Architect and external partners/suppliers to meet the most demanding SerDes requirements while ensuring the manufacturability.

Key Responsibilities

Model and simulate the end-to-end high-speed channels including transceivers, IC package, PCB and cross-boards connectors/cables Utilize industry-standard tools and methodologies to perform a variety of time/frequency domain signal integrity analysis (IBIS-AMI, SPICE, full-wave EM analysis, etc) Identify the link quality such as loss, reflection and crosstalk, and resolve the issues Conduct channel-simulations to optimize Eye Diagram, Bit Error Rate (BER) and Signal-Noise-Ratio (SNR) for high-speed signaling across complex system. Perform Channel Operation Margin (COM) analysis to validate the channel health for IEEE compliance Execute Design of Experiments (DOE) sweeping to statistically evaluate the signal integrity qualities across process variations, like silicon corners, trace impedance, routing length, terminations, etc. Interpret the simulation results to provide the design guidelines on board materials, stack-up, transmission line routings, component placement and layout optimization Review digital circuit (especially high speed) schematics to maintain signal integrity Review PCB layout and board material/stack-up, identify the potential signal integrity and power integrity issues, and propose the solutions Support lab validation and debugging to correlate with the simulation data Collaborate with cross-functional teams to drive product development while keeping projects on schedule and within scope. Stay at the forefront of signal integrity innovations and high-speed design technologies, ensuring that AMD continues to lead the industry

Preferred Qualifications

5+ years of experience in high-speed signal integrity engineering Strong expertise in high-speed architecture, interconnects and PCB/package design Knowledge of high-speed interfaces (PCIe, Ethernet, DDR, etc.) Proficiency in SI simulation tools (Keysight ADS, Cadence Sigrity, Ansys HFSS) Familiarity with MATLAB or Python for data analysis and automation Hands-on experience with lab testing tools (TDR, VNA, high-speed oscilloscopes) Excellent problem-solving and cross-functional collaboration skills

Academic Credentials

Master or PhD's degree in Electrical Engineering, Computer Engineering, or related field

Location: Santa Clara, CA