PMTS Systems Design Engineer

Lead / Principal Systems Design Engineer

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

We are looking for a dynamic, energetic Lead / Principal Systems Design Engineer to join our growing team. As a key contributor to the success of AMD's product, you will be part of a leading team to drive and improve AMD's abilities to deliver the highest quality, industry-leading technologies to market. The Systems Design Engineering team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development.

A System Power Design Expert is sought to focus on system power breakdown, optimization and KPI, developing advanced DC-DC power delivery solutions for next-generation motherboard platforms. Required capabilities include solving complex technical problems, performing meticulous validation and debugging, and maintaining a system-level optimization perspective. Clear communication in English and proactive coordination across cross-functional teams are essential. Valuing diverse input and aligning efforts toward shared objectives is expected.

Key responsibilities include:

• Own the end to end power architecture for x86 platforms (desktop, notebook, or server), spanning APU/CPU, memory, chipset, PCIe, and auxiliary power rails.
• Design, simulate, and optimize high-efficiency DC-DC power solutions for battery life and high-performance CPU/APU platforms.
• Schematic design, PCB layout reviews, and component selection to meet power delivery requirement (e.g., voltage ripple, transient response, efficiency etc.).
• Collaborate with cross-functional teams (Arch, EE, thermal, layout, SI/PI etc.) to delivery motherboard reference board on time.
• Conduct PDN (power delivery network) simulation and analysis, ensure power integrity
• Handle system-level power optimization, from platform hardware (SoC, display, WIFI, SSD, charger, connectivity etc.) to firmware (BIOS/UEFI, EC), ensuring superior battery life
• Perform full stack idle power breakdown, measurement, and bottleneck identification
• Own battery life KPI improvements across platform/silicon / firmware / system layers
• Improve VR/PDN light load efficiency and cooperate with power architecture teams
• Drive display idle power optimization through PSR, DCN, refresh rate and driver improvements
• Drive WLAN/SSD/EC/IO idle consumption via driver/firmware tuning
• Drive BIOS/firmware low power feature implementation and tuning
• Drive battery technology related research to enhance battery life
• Lead cross team battery life validation, regression, and optimization
• Optimize SoC C states / G states / P states and enhance idle residency
• Collaborate closely with silicon power architects to translate SoC power requirements (VID tables, SVI/VR protocols, transients, efficiency targets, low power states) into robust platform level solutions.

Preferred experience includes:

• Proficiency in mobile products, including battery technology / management, battery fuel gauge operation/calibration
• Proficiency in charger, firmware-level settings for BIOS/UEFI and Embedded Controllers (EC).
• Expertise in hardware power management, in-depth knowledge of System & SoC power states (ACPI, C-States, P-States) and low-power modes for peripherals (display, Wi-Fi, SSD, USB).
• Proficiency in DC-DC converter topologies (buck, boost, multiphase), PWM controllers, MOSFET, and power stage.
• Experience with simulation tools (e.g., Simplis, SPICE, PowerDC, Ansys SIWave).
• Strong knowledge of PCB layout considerations for power circuits (e.g., parasitic reduction).
• PDN and PI analysis capability is a plus
• Familiarity with lab equipment: oscilloscopes, spectrum analyzers, and power integrity test setups.
• Knowledge of EMI/EMC mitigation techniques in power designs.
• Good English communication
• Problem-solving mindset, teamwork.

Academic credentials:

• BS or above in Electrical/Electronic/Power Engineering, or related field
• 10+ years of hands-on experience in power hardware design, preferably for laptop platforms.

Location: Shanghai