CIP Silicon Design Engineer (verification)

AMD Job Opportunity

What You Do At AMD Changes Everything At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.

The Role

The focus of this role is to plan, build, and execute the verification of new and existing features for AMD's Internal IP, resulting in no bugs found in Post-Silicon.

The Person

You have a passion for modern, complex processor architecture, digital design, and verification in general. You are a team player who has excellent communication skills and experience collaborating with other engineers located in different sites/time zones. You have strong analytical and problem-solving skills and are willing to learn and ready to take on problems. Strong problem solving, independent thinking, teamwork and communication skills

Key Responsibilities

Work with team members and apply current functional verification techniques to perform and improve pre-silicon verification quality and product Time to Market. Work independently on various DV tasks and provide technical guidance to the DV team. Be involved technically in the porting/creation of the DV environment for the new design, block and chip level test plan creation and implementation, coverage analysis, and regression cleanup.

Preferred Experience

5-12 Year DV Experience with well understanding of UVM. Knowledge on AXI, PCIE is a big plus. Good understanding of ASIC design verification flow RTL coding with Verilog/System Verilog and familiar with front-end design flow and C/C++ programming experiences Knowledge of Perl, OVL, SVA, SV, UVM, OVM, script programming etc.

Academic Credentials

Masters degree in electronic engineering, Computer Science or related

Location

Taipei or Hsinchu