Integrated Circuit Design Engineer

Integrated Circuit Design Engineer

We are seeking an experienced package design engineer to work on complex flip-chip-BGA packages for industry-leading ASICs. These designs cater to high-speed SerDes and very-high-power delivery needs. You will join a worldwide R&D team to develop high-performance package designs for applications such as artificial intelligence (AI), networking, high-performance computing (HPC), and 5G base stations. This role offers the opportunity to collaborate on creating package structures that enable new designs and improve our design team's efficiency.

Responsibilities

1. Design complex flip-chip-BGA packages for ASICs.
2. Collaborate with a global R&D team to develop high-performance package designs.
3. Determine necessary package types by evaluating chips.
4. Assign pins and layout critical structures for SerDes, ADC/DAC, DDR, etc.
5. Apply knowledge of package-level signal integrity and power integrity to designs.
6. Cooperate with internal team members and external vendors across multiple time zones.
7. Manage projects with a focus on package architecture and engineering.
8. Gather requirements and collaborate with chip team partners.
9. Problem-solve engineering issues related to warpage, power integrity, and run SI Wave.
10. Select packages and manage pin assignments.
11. Work with manufacturers to release completed designs.

Essential Skills

• BSEE with 8+ years or MSEE with 6+ years of experience in flip-chip-BGA package design, including high-speed SerDes.
• Experience with Cadence APD (Allegro Package Designer) or equivalent tools.
• Background in semiconductor packaging, signal integrity, power integrity, and design automation.
• Self-management and organizational skills.

Additional Skills & Qualifications

• Project management experience is highly desirable.
• Experience in taking projects from start to finish, including routing and developing structures.

Work Environment

The workplace features a large campus with a focus on employee wellness, including a food hall offering diverse meal options. The company offers competitive pay, great benefits, and a bonus structure.

Pay and Benefits

The pay range for this position is $120000.00 - $250000.00/yr.

ESPP -- purchase shares at a 15% discount on the market price, up to $25k limit401k -- company matches at 100% of the first 6% of salary.

As far as RSUs, I have recently seen Principal candidates receive one-time grants of approximately 4000 shares, vesting quarterly over 4 years. The grant is given not long after hiring (the timing varies depending on the precise hire date), and the first shares vest one quarter after the grant date. There is an opportunity for annual refresh grants.

Workplace Type

This is a fully onsite position in Fort Collins, CO.

Application Deadline

This position is anticipated to close on Sep 25, 2025.