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Static Timing Analysis Engineer

Lead chip-level timing closure and optimization for advanced 7nm technology nodes
Bangalore
Senior
13 hours agoBe an early applicant
Accenture

Accenture

A global professional services company offering consulting, technology, and outsourcing services to a wide range of industries.

Static Timing Analysis Engineer

Analyze and verify the timing of digital circuits to ensure they meet performance requirements under various operating conditions. Identify critical timing paths, perform timing optimizations, and resolve setup/hold violations to ensure the design functions correctly at the desired clock speeds. Collaborate with design and verification teams to refine timing models and improve circuit performance.

Must have skills: Static Timing Analysis

Good to have skills: NA

Minimum 7.5 year(s) of experience is required

Educational Qualification: 15 years full time education

Roles & Responsibilities:

  • Full Chip level Constraints development, validation, and timing closure
  • Deep understanding of Finfet low technology node 7nm and below
  • Expertise on IO budgeting, MMMC timing eco generation and convergence
  • Expertise in Clock Tree analysis for deep submicron
  • Hands-on experience with industry standard tools like PrimeTime, Tempus, Fishtail etc
  • Deep understanding of AOCV, POCV margin methodology
  • Experience in Hyperscale, ILM is advantage
  • Expected to be an SME.
  • Collaborate and manage the team to perform.
  • Responsible for team decisions.
  • Engage with multiple teams and contribute on key decisions.
  • Provide solutions to problems for their immediate team and across multiple teams.
  • Mentor junior team members to enhance their skills and knowledge in timing analysis.
  • Continuously evaluate and implement best practices in static timing analysis to improve team performance.

Professional & Technical Skills:

  • Must To Have Skills: Proficiency in Static Timing Analysis.
  • Strong understanding of digital circuit design principles.
  • Experience with timing analysis tools and methodologies.
  • Ability to analyze complex timing issues and provide effective solutions.
  • Familiarity with design verification processes and tools.

Additional Information:

The candidate should have minimum 7.5 years of experience in Static Timing Analysis.

This position is based at our Bengaluru office.

A 15 years full time education is required.

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Static Timing Analysis Engineer
Bangalore
Engineering
About Accenture
A global professional services company offering consulting, technology, and outsourcing services to a wide range of industries.