Sr. RFIC Layout Design Engineer, Project Kuiper

Kuiper Sr. RFIC Layout Design Engineer

Project Kuiper is an initiative to launch a constellation of Low Earth Orbit satellites that will provide low-latency, high-speed broadband connectivity to unserved and underserved communities around the world. Role for Kuiper Sr. RFIC Layout design engineer:

As a Sr. RFIC Layout design engineer, you will be an integral part of the IC design team. Lead layout at a technical level, build circuit layouts for RF controller architectures. You will work in an integral team with the RFIC/Mixed signal designers on full chip layout of custom analog and RFIC designs. Work with the IC designers and chip leads to determine the chip floor plan. This includes strategies for power and ground distribution as well as working with package engineers to determine pad locations. You are required to accurately estimating the schedule for the layout tasks in a timely manner that is trackable, reportable and in sync with project deliverables. You are to identifying areas of complexity that needs early investigation.

Perform custom layout of RF and analog circuit blocks with attention to matching and minimizing parasitics in the layout. Requirements include proficiency in Cadence Software (EDA) to develop, test and improve manufacturing processes and product designs for analog circuits. Proficiency in DRCs, ERCs and LVS checks; and resolving errors. Proficiency top-level layout integration with ESD structures and pad assembly; Including density fill, running DFM checks, preparing database for foundry delivery

Export Control Requirement: Due to applicable export control laws and regulations, candidates must be a U.S. citizen or national, U.S. permanent resident (i.e., current Green Card holder), or lawfully admitted into the U.S. as a refugee or granted asylum.

Key job responsibilities:

• You will work closely with an internal inter-disciplinary team to drive key aspects of product definition, execution and optimization.
• You must be responsive, flexible and able to succeed within an open collaborative peer environment.
• You are required to specialize in application-specific integrated circuits. Additional requirements include proficiency/expertise in Cadence Software (CAD) to develop, test and improve manufacturing processes and product designs for analog circuits.
• Proficiency in verification software for Design Rule Checks (DRCs) and Layout vs Schematic (LVS) are necessary.
• Perform checks such as multi-patterning, latch-up, ESD, and density.
• Required to perform layout in a timely manner that is trackable, reportable and in sync with project schedule.
• Collaborate with digital design, and other RFIC design teams to define floorplans for RF front-ends and beamforming ICs.
• Layout high-performance analog, RF and mm-wave circuits keeping in mind requirements for matching, parasitic capacitance, electromigration, and all DRC rules.